Technology-driven limitations will soon force microprocessor chips to contain multiple processing cores, as the scalability of individual cores peaks but transistor counts continue to increase. To obtain best performance, flexible management of the on-chip resources, such as cache memory and off-chip bandwidth, is needed. However, control for the dynamic management of these on-chip resources is difficult to design. In this paper, we propose a method for developing such a controller: evolving a recurrent neural network using the Enforced Subpopulations algorithm. The method is tested in a trace-based simulation that measures dynamic assignation of a pool of level-two cache banks to a set of processing cores. We present results showing that, when the chip is controlled by the neural network, we obtain a 13% performance improvement over static cache partitioning.

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In Proceedings of the {INNS-IEEE} International Joint Conference on Neural Networks, 2355-2361, Piscataway, NJ, 2001. IEEE.

@InProceedings{gomez:ijcnn01, title={A Neuroevolution Method For Dynamic Resource Allocation On A Chip Multiprocessor}, author={Faustino J. Gomez and Doug Burger and Risto Miikkulainen}, booktitle={Proceedings of the {INNS-IEEE} International Joint Conference on Neural Networks}, address={Piscataway, NJ}, publisher={IEEE}, pages={2355-2361}, url="http://nn.cs.utexas.edu/?gomez:ijcnn01", year={2001} }